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Titlebook: Wafer-Level Integrated Systems; Implementation Issue Stuart K. Tewksbury Book 1989 Kluwer Academic Publishers 1989 Flip-Flop.Generator.Prog

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發(fā)表于 2025-3-21 19:25:01 | 只看該作者 |倒序?yàn)g覽 |閱讀模式
書目名稱Wafer-Level Integrated Systems
副標(biāo)題Implementation Issue
編輯Stuart K. Tewksbury
視頻videohttp://file.papertrans.cn/1021/1020141/1020141.mp4
叢書名稱The Springer International Series in Engineering and Computer Science
圖書封面Titlebook: Wafer-Level Integrated Systems; Implementation Issue Stuart K. Tewksbury Book 1989 Kluwer Academic Publishers 1989 Flip-Flop.Generator.Prog
描述From the perspective of complex systems, conventional Ie‘s can be regarded as "discrete" devices interconnected according to system design objectives imposed at the circuit board level and higher levels in the system implementation hierarchy. However, silicon monolithic circuits have progressed to such complex functions that a transition from a philosophy of integrated circuits (Ie‘s) to one of integrated sys- tems is necessary. Wafer-scale integration has played an important role over the past few years in highlighting the system level issues which will most significantly impact the implementation of complex monolithic systems and system components. Rather than being a revolutionary approach, wafer-scale integration will evolve naturally from VLSI as defect avoidance, fault tolerance and testing are introduced into VLSI circuits. Successful introduction of defect avoidance, for example, relaxes limits imposed by yield and cost on Ie dimensions, allowing the monolithic circuit‘s area to be chosen according to the natural partitioning of a system into individual functions rather than imposing area limits due to defect densities. The term "wafer- level" is perhaps more appropriate th
出版日期Book 1989
關(guān)鍵詞Flip-Flop; Generator; Programmable Logic; VLSI; Wafer; circuit; fault tolerance; integrated circuit; interco
版次1
doihttps://doi.org/10.1007/978-1-4613-1625-1
isbn_softcover978-1-4612-8898-5
isbn_ebook978-1-4613-1625-1Series ISSN 0893-3405
issn_series 0893-3405
copyrightKluwer Academic Publishers 1989
The information of publication is updating

書目名稱Wafer-Level Integrated Systems影響因子(影響力)




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978-1-4612-8898-5Kluwer Academic Publishers 1989
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General Testing Techniques,he emphasis is on general purpose schemes, such as scan path design of VLSI circuits and syndrome test compression. Special purpose testing schemes (e.g. [5,6,7,8]) developed for specific system functions (PLA’s, random access memories, linear matrix operations, etc) are considered separately in the next chapter.
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Interconnect Issues,This chapter reviews several system performance limits imposed on electronic digital systems by their electrical interconnection fabric. Relaxing such limits is perhaps the major motivation for WSI, though different WSI projects typically address different interconnection issues.
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Interconnect Issues,This chapter reviews several system performance limits imposed on electronic digital systems by their electrical interconnection fabric. Relaxing such limits is perhaps the major motivation for WSI, though different WSI projects typically address different interconnection issues.
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