Titlebook: VLSI — Compatible Implementations for Artificial Neural Networks; Sied Mehdi Fakhraie,Kenneth Carless Smith Book 1997 Springer Science+Bus

焦慮

Review of Hardware-Implementation Techniques,s) while subjected to a process of gradual change in the weights as governed by a training algorithm. The training process tries to reduce the error observed at the output, namely the difference between the desired output values and the currently-existing ones.

cognizant

Generalized Artificial Neural Networks (GANNs),simple MOS-compatible synapses are discussed next, and then several conventional test problems used in this work are introduced. Finally, the results of our simulations are shown, and the necessity for a more detailed analysis of networks composed of simple-transistor synapses is discussed.

教唆

Foundations: Architecture Design,in the performance of hardware-implemented ANNs will then be discussed. As revealed in a resource-finding exploration, several techniques will be introduced by which to remedy the inherent limitations of single-transistor synapses. The remaining part of the chapter will be devoted to demonstration and comparison of proposed architectures.