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Titlebook: VLSI Specification, Verification and Synthesis; Graham Birtwistle,P. A. Subrahmanyam Book 1988 Springer Science+Business Media New York 19

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書目名稱VLSI Specification, Verification and Synthesis
編輯Graham Birtwistle,P. A. Subrahmanyam
視頻videohttp://file.papertrans.cn/981/980102/980102.mp4
叢書名稱The Springer International Series in Engineering and Computer Science
圖書封面Titlebook: VLSI Specification, Verification and Synthesis;  Graham Birtwistle,P. A. Subrahmanyam Book 1988 Springer Science+Business Media New York 19
描述VLSI Specification, Verification and Synthesis Proceedings of a workshop held in Calgary from 12-16 January 1987. The collection of papers in this book represents some of the discussions and presentations at a workshop on hardware verification held in Calgary, January 12-16 1987. The thrust of the workshop was to give the floor to a few leading researchers involved in the use of formal approaches to VLSI design, and provide them ample time to develop not only their latest ideas but also the evolution of these ideas. In contrast to simulation, where the objective is to assist in detecting errors in system behavior in the case of some selected inputs, the intent of hardware verification is to formally prove that a chip design meets a specification of its intended behavior (for all acceptable inputs). There are several important applications where formal verification of designs may be argued to be cost-effective. Examples include hardware components used in "safety critical" applications such as flight control, industrial plants, and medical life-support systems (such as pacemakers). The problems are of such magnitude in certain defense applications that the UK Ministry of Defense fee
出版日期Book 1988
關(guān)鍵詞Hardware; VLSI; design; formal verification; simulation; verification
版次1
doihttps://doi.org/10.1007/978-1-4613-2007-4
isbn_softcover978-1-4612-9197-8
isbn_ebook978-1-4613-2007-4Series ISSN 0893-3405
issn_series 0893-3405
copyrightSpringer Science+Business Media New York 1988
The information of publication is updating

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VLSI Specification, Verification and Synthesis978-1-4613-2007-4Series ISSN 0893-3405
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https://doi.org/10.1007/978-1-4613-2007-4Hardware; VLSI; design; formal verification; simulation; verification
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A Compositional Model of MOS Circuits,tly in designs. Bryant’s model has formed the basis of several hardware simulators. From the point of view of verification, however, it suffers the inadequacy that it is not compositional, an expression which will be explained further. This makes it hard to use the model to reason in a structured way.
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P. A. Subrahmanyamecifications, with non-standardized (die specific) but completely and electronically transferable mechanical specifications”. In other words, the category of challenges associated with KGD are no different than those faced by any customer using a new or different package type. Electrical performance
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