Titlebook: Ultra-Low-Voltage Design of Energy-Efficient Digital Circuits; Nele Reynders,Wim Dehaene Book 2015 Springer International Publishing Switz

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江湖郎中

https://doi.org/10.1007/978-3-319-16136-5Energy-Efficient Digital Circuits; High Performance Integrated Circuit Design; Sub-Threshold Operation

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Osteons

978-3-319-38608-9Springer International Publishing Switzerland 2015

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Ultra-Low-Voltage Design of Energy-Efficient Digital Circuits978-3-319-16136-5Series ISSN 1872-082X Series E-ISSN 2197-1854

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champaign

苦惱

Gate-Level Building Blocks,only to operate at very low supply voltages in a variation-resilient manner, but also to function at speeds of . × 10?MHz. Such targets are only possible to achieve when attention is paid to both the transistor-level basic circuits and the architectural level. Careful design of logic gates is crucia

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Architectural Design,ovided for efficient and robust ultra-low-voltage functionality. This chapter starts with theoretical considerations on energy consumption, specifically for transistors operating in the weak inversion region and for circuits which are subjected to high variability. Next, the chapter explores archite

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Datapath Blocks,t of datapath blocks. Their target was to be able to operate at ultra-low supply voltages, while achieving high energy-efficiency, a speed of . × 10MHz and a high yield through variation-resilience. This chapter builds further upon the conclusions of the analyses of different gate-level building blo