| 書目名稱 | SAT-Based Scalable Formal Verification Solutions |
| 編輯 | Malay K. Ganai,Aarti Gupta |
| 視頻video | http://file.papertrans.cn/861/860107/860107.mp4 |
| 概述 | Describes SAT-based model checking approaches and gives engineering details on what makes model checking practical.Techniques covered can be synergistically combined into a scalabe solution.Focuses on |
| 叢書名稱 | Integrated Circuits and Systems |
| 圖書封面 |  |
| 描述 | .Functional verification has become an important aspect of the chip design process. Significant resources, both in industry and academia, are devoted to the design complexity and verification endeavors....SAT-Based Scalable Formal Verification Solutions. discusses in detail several of the latest and interesting scalable SAT-based techniques including: Hybrid SAT Solver, Customized Bounded/Unbounded Model Checking, Distributed Model Checking, Proofs and Proof-based Abstraction Methods, Verification of Embedded Memory System & Multi-clock Systems, and Synthesis for Verification Paradigm. These techniques have been designed and implemented in a verification platform Verisol (formally called DiVer) and have been used successfully in industry. This book provides algorithmic details and engineering insights into devising scalable approaches for an effective realization. It also includes the authors’ practical experiences and recommendations in verifying the large industry designs using VeriSol....The book is primarily written for researchers, scientists, and verification engineers who would like to gain an in-depth understanding of scalable SAT-based verification techniques. The book wil |
| 出版日期 | Book 2007 |
| 關(guān)鍵詞 | algorithms; complexity; computer-aided design (CAD); design process; model; modeling |
| 版次 | 1 |
| doi | https://doi.org/10.1007/978-0-387-69167-1 |
| isbn_softcover | 978-1-4419-4341-5 |
| isbn_ebook | 978-0-387-69167-1Series ISSN 1558-9412 Series E-ISSN 1558-9420 |
| issn_series | 1558-9412 |
| copyright | Springer-Verlag US 2007 |
|Archiver|手機(jī)版|小黑屋|
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