| 書目名稱 | Robustness and Usability in Modern Design Flows | | 編輯 | G?rschwin Fey,Rolf Drechsler | | 視頻video | http://file.papertrans.cn/832/831400/831400.mp4 | | 概述 | More automation for time consuming tasks.Powerful tools by exploiting formal techniques.Visionary approach for formal design verification.Debugging at the source level becomes easy.Robustness against | | 圖書封面 |  | | 描述 | The size of technically producible integrated circuits increases continuously. But the ability to design and verify these circuits does not keep up with this development. Therefore, today’s design ?ow has to be improved to achieve a higher productivity. In this book the current design methodology and ver- cation methodology are analyzed, a number of de?ciencies are identi?ed, and solutions are suggested. Improvements in the methodology as well as in the underlying algorithms are proposed. An in-depth presentation of preliminary concepts makes the book self-contained. Based on this foundation major - sign problems are targeted. In particular, a complete tool ?ow for Synthesis for Testability of SystemC descriptions is presented. The resulting circuits are completely testable and test pattern generation in polynomial time is possible. Veri?cation issues are covered in even more detail. A whole new paradigm for formal design veri?cation is suggested. This is based upon design und- standing, the automatic generation of properties, and powerful tool support for debugging failures. All these new techniques are empirically evaluated and - perimental results are provided. As a result, an e | | 出版日期 | Book 2008 | | 關(guān)鍵詞 | Debugging; Design Methodology; Erfüllbarkeitsproblem der Aussagenlogik; Formal Methods; Testing; Usabilit | | 版次 | 1 | | doi | https://doi.org/10.1007/978-1-4020-6536-1 | | isbn_softcover | 978-90-481-7662-5 | | isbn_ebook | 978-1-4020-6536-1 | | copyright | Springer Science+Business Media B.V. 2008 |
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