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Titlebook: Resilient Architecture Design for Voltage Variation; Vijay Janapa Reddi,Meeta Sharma Gupta Book 2013 Springer Nature Switzerland AG 2013

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發(fā)表于 2025-3-21 19:27:43 | 只看該作者 |倒序瀏覽 |閱讀模式
書目名稱Resilient Architecture Design for Voltage Variation
編輯Vijay Janapa Reddi,Meeta Sharma Gupta
視頻videohttp://file.papertrans.cn/829/828359/828359.mp4
叢書名稱Synthesis Lectures on Computer Architecture
圖書封面Titlebook: Resilient Architecture Design for Voltage Variation;  Vijay Janapa Reddi,Meeta Sharma Gupta Book 2013 Springer Nature Switzerland AG 2013
描述Shrinking feature size and diminishing supply voltage are making circuits sensitive to supply voltage fluctuations within the microprocessor, caused by normal workload activity changes. If left unattended, voltage fluctuations can lead to timing violations or even transistor lifetime issues that degrade processor robustness. Mechanisms that learn to tolerate, avoid, and eliminate voltage fluctuations based on program and microarchitectural events can help steer the processor clear of danger, thus enabling tighter voltage margins that improve performance or lower power consumption. We describe the problem of voltage variation and the factors that influence this variation during processor design and operation. We also describe a variety of runtime hardware and software mitigation techniques that either tolerate, avoid, and/or eliminate voltage violations. We hope processor architects will find the information useful since tolerance, avoidance, and elimination are generalizable constructsthat can serve as a basis for addressing other reliability challenges as well. Table of Contents: Introduction / Modeling Voltage Variation / Understanding the Characteristics of Voltage Variation / T
出版日期Book 2013
版次1
doihttps://doi.org/10.1007/978-3-031-01739-1
isbn_softcover978-3-031-00611-1
isbn_ebook978-3-031-01739-1Series ISSN 1935-3235 Series E-ISSN 1935-3243
issn_series 1935-3235
copyrightSpringer Nature Switzerland AG 2013
The information of publication is updating

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沙發(fā)
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Introduction,eature sizes shrink and chip designers attempt to reduce supply voltage to meet power targets in large multicore systems, parameter variations are becoming a serious problem. Parameter variations can be broadly classified as device variations incurred due to imperfections in the manufacturing proces
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Understanding the Characteristics of Voltage Variation,ss are subject to the selection process of benchmarks, and choosing a non-representative set of benchmarks may lead to biased observations, incorrect conclusions, and, eventually, designs that poorly match their target workloads.
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Predicting and Avoiding Voltage Emergencies,oduced by clock gating in the microprocessor were the primary reason for large voltage variation. Their recommended approach was to gradually activate and deactivate functional units as required to mitigate the large and sudden current fluctuations. Over recent years, more effort has been focused on
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發(fā)表于 2025-3-23 02:34:43 | 只看該作者
Eliminiating Recurring Voltage Emergencies,e gracefully by a compiler. A hardware-based solution may repeatedly throttle, or roll back, on an emergency recurring at the same program location because it lacks global knowledge involving program structure and activity. In contrast, a compiler typically has several options when choosing the orde
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