| 書目名稱 | Reasoning in Boolean Networks |
| 副標(biāo)題 | Logic Synthesis and |
| 編輯 | Wolfgang Kunz,Dominik Stoffel |
| 視頻video | http://file.papertrans.cn/823/822494/822494.mp4 |
| 叢書名稱 | Frontiers in Electronic Testing |
| 圖書封面 |  |
| 描述 | .Reasoning in Boolean Networks. provides a detailedtreatment of recent research advances in algorithmic techniques forlogic synthesis, test generation and formal verification of digitalcircuits. The book presents the central idea of approaching designautomation problems for logic-level circuits by specific Booleanreasoning techniques. .While Boolean reasoning techniques have been a central element oftwo-level circuit theory for many decades .Reasoning in Boolean..Networks. describes a basic reasoning methodology for multi-levelcircuits. This leads to a unified view on two-level and multi-levellogic synthesis. The presented reasoning techniques are applied tovarious CAD-problems to demonstrate their usefulness for today‘sindustrially relevant problems. ..Reasoning in Boolean Networks. provides lucid descriptions ofbasic algorithmic concepts in automatic test pattern generation, logicsynthesis and verification and elaborates their intimate relationshipto provide further intuition and insight into the subject. Numerousexamples are provide for ease in understanding the material. ..Reasoning in Boolean Networks. is intended for researchers inlogic synthesis, VLSI testing and formal veri |
| 出版日期 | Book 1997 |
| 關(guān)鍵詞 | VLSI; algorithms; automation; circuit; circuit design; computer-aided design (CAD); formal verification; in |
| 版次 | 1 |
| doi | https://doi.org/10.1007/978-1-4757-2572-8 |
| isbn_softcover | 978-1-4419-5176-2 |
| isbn_ebook | 978-1-4757-2572-8Series ISSN 0929-1296 |
| issn_series | 0929-1296 |
| copyright | Springer-Verlag US 1997 |
|Archiver|手機版|小黑屋|
派博傳思國際
( 京公網(wǎng)安備110108008328)
GMT+8, 2025-10-6 17:48
發(fā)表于 2025-3-21 19:51:51
