| 書目名稱 | Processor Microarchitecture | | 副標(biāo)題 | An Implementation Pe | | 編輯 | Antonio González,Fernando Latorre,Grigorios Magkli | | 視頻video | http://file.papertrans.cn/760/759088/759088.mp4 | | 叢書名稱 | Synthesis Lectures on Computer Architecture | | 圖書封面 |  | | 描述 | This lecture presents a study of the microarchitecture of contemporary microprocessors. The focus is on implementation aspects, with discussions on their implications in terms of performance, power, and cost of state-of-the-art designs. The lecture starts with an overview of the different types of microprocessors and a review of the microarchitecture of cache memories. Then, it describes the implementation of the fetch unit, where special emphasis is made on the required support for branch prediction. The next section is devoted to instruction decode with special focus on the particular support to decoding x86 instructions. The next chapter presents the allocation stage and pays special attention to the implementation of register renaming. Afterward, the issue stage is studied. Here, the logic to implement out-of-order issue for both memory and non-memory instructions is thoroughly described. The following chapter focuses on the instruction execution and describes the different functional units that can be found in contemporary microprocessors, as well as the implementation of the bypass network, which has an important impact on the performance. Finally, the lecture concludes with | | 出版日期 | Book 2011 | | 版次 | 1 | | doi | https://doi.org/10.1007/978-3-031-01729-2 | | isbn_softcover | 978-3-031-00601-2 | | isbn_ebook | 978-3-031-01729-2Series ISSN 1935-3235 Series E-ISSN 1935-3243 | | issn_series | 1935-3235 | | copyright | Springer Nature Switzerland AG 2011 |
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