| 書目名稱 | Post-Silicon and Runtime Verification for Modern Processors |
| 編輯 | Ilya Wagner,Valeria Bertacco |
| 視頻video | http://file.papertrans.cn/753/752070/752070.mp4 |
| 概述 | Addresses an area of hardware verification that is growing both in industry and academia..Covers hardware patching and error avoidance..Discusses multi-core processors with test generation and respons |
| 圖書封面 |  |
| 描述 | .The purpose of this book is to survey the state of the art and evolving directions in post-silicon and runtime verification. The authors start by giving an overview of the state of the art in verification, particularly current post-silicon methodologies in use in the industry, both for the domain of processor pipeline design and for memory subsystems. They then dive into the presentation of several new post-silicon verification solutions aimed at boosting the verification coverage of modern processors, dedicating several chapters to this topic. The presentation of runtime verification solutions follows a similar approach. This is an area of processor design that is still in its early stages of exploration and that holds the promise of accomplishing the ultimate goal of achieving complete correctness guarantees for microprocessor-based computation.?The?authors?conclude the book with a look towards the future of late-stage verification and its growing role in the processor life-cycle.. |
| 出版日期 | Book 2011 |
| 關(guān)鍵詞 | Error Avoidance; Hardware Patching; Modern Processor; Multi-Core Processors; Post-Silicon; Processors Cor |
| 版次 | 1 |
| doi | https://doi.org/10.1007/978-1-4419-8034-2 |
| isbn_softcover | 978-1-4899-8150-9 |
| isbn_ebook | 978-1-4419-8034-2 |
| copyright | Springer Science+Business Media, LLC 2011 |
|Archiver|手機(jī)版|小黑屋|
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