Titlebook: Parallel Processing: CONPAR 92 — VAPP V; Second Joint Interna Luc Bougé,Michel Cosnard,Denis Trystram Conference proceedings 1992 Springer-

flaunt

Abduct

978-3-540-55895-8Springer-Verlag Berlin Heidelberg 1992

HATCH

PTCA635

https://doi.org/10.1007/3-540-55895-0Hardware; Parallel Algorithms; Vectorprocessors; algorithm; algorithms; computational science; development

預(yù)感

易于交談

On incomplete hypercubes,miltonian circuits of incomplete hypercubes. The main result is a constructive proof that an .-cube from which up to .?2 vertex-disjoint subcubes are removed so that it remains connected is a Hamiltonian graph and its Hamiltonian circuit can be constructed. If the communication subsystem can use a c

Ibd810

carotenoids

Interconnection networks based on block designs,r while keeping the number of processor ports small. With a smart multiplexing technique and the use of a class of bipartite graphs we are able to construct e.g. a 1210 processor machine with 4 ports/processor and diameter 2.

Microgram

Partitioning and mapping communication graphs on a modular reconfigurable parallel architecture,of a given algorithm provides flexibility for efficient execution of various applications. But, due to communication links switching devices design constraints, connecting a large number of processors on a dynamically programmable interconnection structure, leads to the design of a modular interconn

桉樹(shù)

Generalized shuffle-exchange networks,and contains it as a special case), but some of them possess recursive structures lacking in the classical SE net. This allow them to be constructed from identical or a small number of different building blocks and make them very attractive from a hardware-design point of view. For an extensive acco