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Titlebook: On-Chip Photonic Interconnects; A Computer Architect Christopher J. Nitta,Matthew K. Farrens,Venkatesh Book 2014 Springer Nature Switzerla

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發(fā)表于 2025-3-27 00:20:59 | 只看該作者
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發(fā)表于 2025-3-27 11:35:11 | 只看該作者
Other Developments, computer architect. Some of these developments, such as those in implementation technologies and devices (particularly lasers), could impact the design of future on-chip networks. Others have the potential to overcome various bottlenecks in computer system design. In this chapter we will briefly describe some of these developments.
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Challenges,y sensitive to variations in temperature. This is particularly challenging if a computing system design uses hundreds of thousands of these components, and they are integrated into (or in close proximity to) a package which contains the heat-generating processors themselves.
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發(fā)表于 2025-3-28 00:52:47 | 只看該作者
Summary & Conclusion,an be dissipated without the use of special (and expensive) cooling and packaging techniques. With each generation of electrical interconnects consuming more power to provide the necessary increase in bandwidth, there is less energy available for . Thus, it is important that architects begin to look elsewhere for solutions.
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發(fā)表于 2025-3-28 08:46:27 | 只看該作者
1935-3235 the interconnection network. Electrical interconnects are not likely to scale well to a large number of processors for energy efficiency reasons, and the problem is compounded by the fact that there is a fixed total power budget for a die, dictated by the amount of heat that can be dissipated withou
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發(fā)表于 2025-3-28 12:22:11 | 只看該作者
Book 2014onnection network. Electrical interconnects are not likely to scale well to a large number of processors for energy efficiency reasons, and the problem is compounded by the fact that there is a fixed total power budget for a die, dictated by the amount of heat that can be dissipated without special
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