Titlebook: Network-on-Chip Security and Privacy; Prabhat Mishra,Subodha Charles Book 2021 The Editor(s) (if applicable) and The Author(s), under excl

Apraxia

Lightweight Encryption Using Incremental Cryptographylity to all communications in the SoC, it has been one of the primary targets for security attacks. While packet encryption can provide secure communication, it can introduce unacceptable energy and performance overhead due to the resource-constrained nature of SoC designs. In this chapter, we explo

SHOCK

Optometrist

Lightweight Anonymous Routing for On-chip Interconnectsing SoC complexity, coupled with tight time-to-market deadlines, has led to increased utilization of Intellectual Property (IP) cores from third-party vendors. SoC supply chain is widely acknowledged as a major source of security vulnerabilities. Potentially malicious third-party IPs integrated on t

fibula

Secure Cryptography Integration: NoC-Based Microarchitectural Attacks and Countermeasuresnd communication is ubiquitous. Security in such environments is a major requirement. In order to cope with the security needs and provide confidentiality and authentication services, MPSoCs usually integrate cryptographic functionalities deployed as software and/or hardware solutions. However, the

火花

Real-Time Detection and Localization of DoS Attacks complexity coupled with its widespread usage has made it a focal point of potential security attacks. Denial-of-Service (DoS) is one such attack that is caused by malicious intellectual property (IP) cores flooding the network with unnecessary packets causing significant performance degradation thr

gospel

Securing on-Chip Communication Using Digital Watermarking time-to-market constraints. A typical SoC consists of a wide variety of IP cores (such as processor, memory, controller, FPGA, etc.) that interact using a Network-on-Chip (NoC). This global trend of designing SoCs using third-party IPs raises serious concerns about security vulnerabilities. Since N

嬰兒

Network-on-Chip Attack Detection using Machine Learninge. SoC designers increasingly rely on global supply chains for obtaining third-party IPs. In addition to inherent vulnerabilities associated with utilizing third-party IPs, NoC-based SoCs enable attackers to exploit the distributed nature of NoC and its connectivity with various IPs to launch a plet

狼群

Modicum

Network-on-Chip Security and Trust Verification (SoC). Network-on-Chip (NoC) is a scalable solution to provide communication between a large number of IP cores in modern SoC designs. While SoC design methodology relies on third-party IPs to reduce cost and meet time-to-market constraints, it raises serious security concerns. NoC is an ideal targ

parallelism

NoC Post-Silicon Validation and Debugth the increasing complexity of SoCs. This results in multiple bugs being present on the interconnect module even after the pre-silicon verification stage. Hence, efficient post-silicon debug mechanisms should be employed to detect the skipped bugs and provide an error-free NoC. This chapter highlig