Titlebook: NANO-CHIPS 2030; On-Chip AI for an Ef Boris Murmann,Bernd Hoefflinger Book 2020 Springer Nature Switzerland AG 2020 Nano-Electronics.Artifi

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Acetabulum

The Memory Challenge in Ultra-Low Power Deep Learning,have storage requirements for both weights and activations that are often not compatible with on-chip memories and/or low cost, low power external memory options. In this chapter, we outline key ideas, recent achievements, and directions for future research towards taming the memory bottleneck for ultra-low power ML circuits and systems.

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連鎖

Silicon Complementary MOS into Its 7th Decade,imum parasitics, best energy efficiency and?>300?GHz bandwidth. In its sub-threshold mode-of-operation, it offers the most eye-like image sensor, and it allows robust logic operation down to 200?mV. The key future challenge is the efficient 3D integration of trillions of these ideal transistors into intelligent networks.

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SUGAR

Machine Learning at the Edge, chapter reviews state-of-the-art approaches and trends for low-energy machine learning inference and training at the edge. It covers dataflow, architecture and circuit design aspects of fully digital processors and mixed analog/digital implementations targeting the microwatts and milliwatts range.

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Nanolithography, opportunities for Nano-Imprint, Multiple-Electron-Bean Direct Writing and Directed Self-Assembly. To support the major drive towards 3D integration, new patterning and precision-alignment techniques will be introduced (Chaps. .–., . and .).

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