Titlebook: Mathematik lernen, darstellen, deuten, verstehen; Didaktische Sichtwei Jasmin Sprenger,Anke Wagner,Marc Zimmermann Book 2013 Springer Fachm

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Sebastian Kuntze These options enable a user to trade-off between hardware resources, performance, and power consumption. A simulation based technique is utilized for testing purposes. The processor is implemented in a Xilinx Virtex-6 FPGA as well as synthesized to a 90 nm ASIC technology. Compared to the permanent

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Elisabeth Rathgeb-Schniererhird parts extend virtual actuators and virtual sensors towards the classes of Hammerstein-Wiener systems and piecewise affine systems. The main analyses concern stability recovery, setpoint tracking recovery, and performance recovery as reconfiguration objectives. The fourth part concludes the mono

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Stephanie Schulerhird parts extend virtual actuators and virtual sensors towards the classes of Hammerstein-Wiener systems and piecewise affine systems. The main analyses concern stability recovery, setpoint tracking recovery, and performance recovery as reconfiguration objectives. The fourth part concludes the mono