找回密碼
 To register

QQ登錄

只需一步,快速開(kāi)始

掃一掃,訪問(wèn)微社區(qū)

打印 上一主題 下一主題

Titlebook: Low-Power Variation-Tolerant Design in Nanometer Silicon; Swarup Bhunia,Saibal Mukhopadhyay Book 2011 Springer Science+Business Media, LLC

[復(fù)制鏈接]
查看: 23944|回復(fù): 47
樓主
發(fā)表于 2025-3-21 19:01:28 | 只看該作者 |倒序?yàn)g覽 |閱讀模式
書(shū)目名稱(chēng)Low-Power Variation-Tolerant Design in Nanometer Silicon
編輯Swarup Bhunia,Saibal Mukhopadhyay
視頻videohttp://file.papertrans.cn/589/588899/588899.mp4
概述Presents important challenges in nanometer scale integrated circuit design.Presents a holistic view of Low-Power Variation-Tolerant Design.Covers modeling, analysis and design methodology for low powe
圖書(shū)封面Titlebook: Low-Power Variation-Tolerant Design in Nanometer Silicon;  Swarup Bhunia,Saibal Mukhopadhyay Book 2011 Springer Science+Business Media, LLC
描述Design considerations for low-power operations and robustness with respect to variations typically impose contradictory requirements. Low-power design techniques such as voltage scaling, dual-threshold assignment and gate sizing can have large negative impact on parametric yield under process variations. This book focuses on circuit/architectural design techniques for achieving low power operation under parameter variations. We consider both logic and memory design aspects and cover modeling and analysis, as well as design methodology to achieve simultaneously low power and variation tolerance, while minimizing design overhead. This book will discuss current industrial practices and emerging challenges at future technology nodes.
出版日期Book 2011
關(guān)鍵詞DFM; Design for Manufacturing; EDA; Electronic Design Automation; Integrated Circuit Design; Low Power IC
版次1
doihttps://doi.org/10.1007/978-1-4419-7418-1
isbn_softcover978-1-4899-8157-8
isbn_ebook978-1-4419-7418-1
copyrightSpringer Science+Business Media, LLC 2011
The information of publication is updating

書(shū)目名稱(chēng)Low-Power Variation-Tolerant Design in Nanometer Silicon影響因子(影響力)




書(shū)目名稱(chēng)Low-Power Variation-Tolerant Design in Nanometer Silicon影響因子(影響力)學(xué)科排名




書(shū)目名稱(chēng)Low-Power Variation-Tolerant Design in Nanometer Silicon網(wǎng)絡(luò)公開(kāi)度




書(shū)目名稱(chēng)Low-Power Variation-Tolerant Design in Nanometer Silicon網(wǎng)絡(luò)公開(kāi)度學(xué)科排名




書(shū)目名稱(chēng)Low-Power Variation-Tolerant Design in Nanometer Silicon被引頻次




書(shū)目名稱(chēng)Low-Power Variation-Tolerant Design in Nanometer Silicon被引頻次學(xué)科排名




書(shū)目名稱(chēng)Low-Power Variation-Tolerant Design in Nanometer Silicon年度引用




書(shū)目名稱(chēng)Low-Power Variation-Tolerant Design in Nanometer Silicon年度引用學(xué)科排名




書(shū)目名稱(chēng)Low-Power Variation-Tolerant Design in Nanometer Silicon讀者反饋




書(shū)目名稱(chēng)Low-Power Variation-Tolerant Design in Nanometer Silicon讀者反饋學(xué)科排名




單選投票, 共有 0 人參與投票
 

0票 0%

Perfect with Aesthetics

 

0票 0%

Better Implies Difficulty

 

0票 0%

Good and Satisfactory

 

0票 0%

Adverse Performance

 

0票 0%

Disdainful Garbage

您所在的用戶(hù)組沒(méi)有投票權(quán)限
沙發(fā)
發(fā)表于 2025-3-21 23:04:22 | 只看該作者
Power Dissipationd. This chapter covers the basics of the IC power consumption issue. It first investigates the sources of IC power dissipation, and then discusses recent techniques for IC power analysis. Finally, it studies recently proposed power optimization techniques from circuit and physical design to system synthesis.
板凳
發(fā)表于 2025-3-22 03:26:20 | 只看該作者
Low-Power and Variation-Tolerant Application-Specific System Designas power and performance with system level metrics such as quality-of-results and tolerance to variations (yield). The techniques presented in this chapter target various types of designs that include logic and memory architectures and complete DSP systems.
地板
發(fā)表于 2025-3-22 07:40:33 | 只看該作者
5#
發(fā)表于 2025-3-22 09:18:44 | 只看該作者
6#
發(fā)表于 2025-3-22 13:01:36 | 只看該作者
Book 2011c and memory design aspects and cover modeling and analysis, as well as design methodology to achieve simultaneously low power and variation tolerance, while minimizing design overhead. This book will discuss current industrial practices and emerging challenges at future technology nodes.
7#
發(fā)表于 2025-3-22 17:06:45 | 只看該作者
Statistical Design of Integrated Circuitsst-silicon stage, we then present how a set of compact sensors may be used to predict the delay of a manufactured part, with known confidence, through a small set of measurements on the sensors: such data can then be used to drive adaptive post-silicon tuning approaches that are individualized to each manufactured part.
8#
發(fā)表于 2025-3-23 01:14:23 | 只看該作者
Low-Power and Variation-Tolerant Memory Designit techniques, post silicon adaptive repair techniques, and variation-tolerant SRAM peripherals. A self-repairing SRAM is discussed which adaptively adjusts its body bias to improve its reliability. Finally, a discussion on adaptive low-power and variation-tolerant SRAM design for multi-media applications is provided.
9#
發(fā)表于 2025-3-23 04:18:43 | 只看該作者
Variation and Aging Tolerance in FPGAs the ability to spread wear effects over the chip which is not possible in ASICs. This chapter examines the impact of variation and wear on FPGAs and notes the benefit that can be gained from variation and aging tolerance techniques that operate open-loop.
10#
發(fā)表于 2025-3-23 06:25:18 | 只看該作者
 關(guān)于派博傳思  派博傳思旗下網(wǎng)站  友情鏈接
派博傳思介紹 公司地理位置 論文服務(wù)流程 影響因子官網(wǎng) 吾愛(ài)論文網(wǎng) 大講堂 北京大學(xué) Oxford Uni. Harvard Uni.
發(fā)展歷史沿革 期刊點(diǎn)評(píng) 投稿經(jīng)驗(yàn)總結(jié) SCIENCEGARD IMPACTFACTOR 派博系數(shù) 清華大學(xué) Yale Uni. Stanford Uni.
QQ|Archiver|手機(jī)版|小黑屋| 派博傳思國(guó)際 ( 京公網(wǎng)安備110108008328) GMT+8, 2025-10-13 00:26
Copyright © 2001-2015 派博傳思   京公網(wǎng)安備110108008328 版權(quán)所有 All rights reserved
快速回復(fù) 返回頂部 返回列表
锡林浩特市| 南昌县| 囊谦县| 美姑县| 建湖县| 池州市| 佛山市| 镇巴县| 定南县| 汝南县| 德阳市| 镇赉县| 桃园市| 齐齐哈尔市| 法库县| 民和| 太白县| 册亨县| 扬州市| 霞浦县| 东丽区| 东乡县| 邻水| 新巴尔虎左旗| 德兴市| 永川市| 河北省| 濉溪县| 湘乡市| 祁东县| 定西市| 沽源县| 繁峙县| 寿阳县| 海伦市| 上杭县| 剑阁县| 尼木县| 丰宁| 元朗区| 武清区|