Titlebook: Layout Optimization in VLSI Design; Bing Lu,Ding-Zhu Du,Sachin S. Sapatnekar Book 2001 Springer Science+Business Media Dordrecht 2001 Stan

Chivalrous

Integrated Floorplanning and Interconnect Planning,ulated annealing approach in which different interconnect planning methods are used in different ranges of temperatures to reduce running time. A temperature adjustment scheme is designed to give smooth transistions between different stages of simulated annealing. Experimental results show that our approach performs well.

demote