Titlebook: Languages and Compilers for Parallel Computing; Fourth International Utpal Banerjee,David Gelernter,David Padua Conference proceedings 1992

Obstreperous

支架

Compilation of Id,gether. Id is a higher-order non-strict functional language augmented with I-structures and M-structures. The operational semantics of Id is given in terms of a smaller . language, called Kid. Kid is also the intermediate form used by the compiler to perform type checking and optimizations. Optimiza

核心

An executable representation of distance and direction,entation of program dependences. The execution model, called dependencedriven execution, is a generalization of the tagged-token dataflow model that permits imperative updates to memory. The dependence flow graph subsumes other representations such as continuation-passing style [12], data dependence

殺人

Integrating scalar optimization and parallelization, (low-level) optimizations. Our compiler has only one intermediate language — SUIF (Stanford University Intermediate Form) — for both parallelization and scalar optimizations. Having only one intermediate language offers two advantages: no duplication of functions between the two levels, and availab

調(diào)整校對

Optimization of data/control conditions in task graphs,ew parallel architectures and recent progress in interprocedural dependence analysis suggest new directions for the exploitation of parallelism across loop and procedure boundaries (or functional-parallelism). This paper presents an intermediate parallel program representation which encapsulates min

小故事

Recognizing and parallelizing bounded recurrences,currences can be executed concurrently and examine the problem of detecting them automatically. The contribution of this paper is a framework for representing information about recurrences and examination of some structural aspects of bounded recurrences. I also examine linear recurrences in some de

flaunt

somnambulism

光明正大

Register allocation, renaming and their impact on fine-grain parallelism,extra registers which may affect register allocation. Thus a tradeoff between register allocation and parallelism has to be made to optimize the code performance for fine-grain parallel machines (i.e. pipelined, VLIW‘s, superscalars). Because of the complexity involved, previous compilers have avoid

膝蓋

Data flow and dependence analysis for instruction level parallelism,zation techniques. Dynamic single assignment is presented as a parallel program representation that permits programs, with cyclic control flow graphs, to be expressed in their maximally parallel form (i.e., with a minimal number of dependence arcs). Also, a data flow analysis technique is outlined t