Titlebook: High Performance Computing; International Sympos Constantine Polychronopoulos,Kazuki Joe,Makoto Ama Conference proceedings 1997 Springer-Ve

案發(fā)地點(diǎn)

Data dependence path reduction with tunneling load instructions,. In order to reduce the dependence path length including the load instructions, we propose the tunneling-load technique. We have evaluated the effects of the tunneling-load, and found that in an in-order-issue superscalar plat-form the instruction level parallelism is increased by over 10%.

暫時(shí)別動(dòng)

Performance estimation of embedded software with pipeline and cache hazard modeling,vily depends on the characteristics of the application and the underlying memory hierarchy, effects from pipeline- and cache stalls must be taken into account. The aim of our methodology is to increase the predictability of software execution time in order to minimize expensive hardware implementation.

recession

instill

Present and future of HPC technologies,al aspects though those are not limited to high performance computing area. The state-of-art technologies however, are always required to achieve the highest speed particularly in high performance computing..The following three technologies are discussed in this talk.