Titlebook: Hardware and Software: Verification and Testing; 13th International H Ofer Strichman,Rachel Tzoref-Brill Conference proceedings 2017 Spring

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A Framework for Asynchronous Circuit Modeling and Verification in ACL2ction and subsequently verify the functional correctness of asynchronous circuit designs. We apply a link-joint paradigm to model asynchronous circuits. Our framework applies a hierarchical verification approach to support scalability. We demonstrate our framework by modeling and verifying the funct

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Modeling Undefined Behaviour Semantics for Checking Equivalence Across Compiler Optimizationsquivalence checking by 31 percentage points (from 50% to 81%) on average, almost uniformly across the two compilers. This significant difference in success rates confirms the widespread impact of undefined behaviour on compiler optimization, something that has been ignored by previous work on equiva

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Modeling Undefined Behaviour Semantics for Checking Equivalence Across Compiler Optimizationsthe ones that exploit undefined behaviour. On the other hand, modern compilers extensively exploit language level undefined behaviour for optimization. Previous work on equivalence checking for translation validation and synthesis yields poor results, when such optimizations relying on undefined beh

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Deferrability Analysis for JavaScripteen downloaded and evaluated, the . and . tags in a script allow the browser to download the script in a background task, and either evaluate it as soon as it is available (for async) or evaluate it in load-order at the end of parsing (for defer). While asynchronous loading can significantly speed u