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Titlebook: Embedded and Ubiquitous Computing; International Confer Laurence T. Yang,Minyi Guo,Niraj K. Jha Conference proceedings 2004 Springer-Verlag

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樓主: Iodine
51#
發(fā)表于 2025-3-30 10:37:54 | 只看該作者
Loop Scheduling for Real-Time DSPs with Minimum Switching Activities on Multiple-Functional-Unit Arccheduling the nodes with schedule length and switching activities minimization based on rotation scheduling and bipartite matching. The experimental results show our algorithm can greatly reduce both schedule length and switching activities compared with the previous work.
52#
發(fā)表于 2025-3-30 13:03:55 | 只看該作者
Experimental Assessment of Scenario-Based Multithreading for Real-Time Object-Oriented Models: A Casur toolset was applied to the PBX system to model scenarios, as well as to generate a scenario-based multithreaded executable. The study clearly shows that our method can handle large-scale, complex models and that scenario-based multithreading achieves the performance improvements for a real-world model.
53#
發(fā)表于 2025-3-30 18:58:16 | 只看該作者
A Virtual Reality Based System for Remote Maintenance of Rotating Machineryrated methodology to remotely monitor and diagnose distant machines by a robot hand. Using a virtual reality environment and a tele-operation system, the vibration data are collected from different checking points. In order to pinpoint the faults, the collected data are analyzed and then using a fuzzy system the features extraction was performed.
54#
發(fā)表于 2025-3-30 22:28:50 | 只看該作者
Conference proceedings 2004 Japan, 25–27 August 2004. Embedded and ubiquitous computing are emerging rapidly as exciting new paradigms and disciplines to provide computing and communication services all the time, everywhere. Its systems are now invading every aspect of life to the point that they are disappearing inside all s
55#
發(fā)表于 2025-3-31 01:17:15 | 只看該作者
56#
發(fā)表于 2025-3-31 07:04:59 | 只看該作者
Automatic Synthesis and Verification of Real-Time Embedded Softwareon-functional requirements. In this work, we reveal the internal architecture and design flow of a newly proposed framework called . (VERTAF), which integrates software component-based reuse, formal synthesis, and formal verification. Component reuse is based on a formal UML real-time embedded objec
57#
發(fā)表于 2025-3-31 11:50:23 | 只看該作者
58#
發(fā)表于 2025-3-31 15:21:27 | 只看該作者
RIFFS: Reverse Indirect Flash File Systemated-in-place. To solve this limitation, the data is stored inside of the proper file. The solution was to construct a reverse-tree. This would be impracticable with the current systems, because it would not be possible to locate a file directly, from root directory. This schema would break the navi
59#
發(fā)表于 2025-3-31 20:58:43 | 只看該作者
60#
發(fā)表于 2025-3-31 21:49:22 | 只看該作者
Loop Scheduling for Real-Time DSPs with Minimum Switching Activities on Multiple-Functional-Unit Arcnal-unit architectures. We formally prove that to find a schedule that has the minimal switching activities among all minimum-latency schedules with or without resource constraints is NP-complete. An algorithm, SAMLS (Switching-Activity Minimization Loop Scheduling), is proposed to minimize both sch
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