Titlebook: Dependable Computing - EDCC-1; First European Depen Klaus Echtle,Dieter Hammer,David Powell Conference proceedings 1994 Springer-Verlag Ber

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Zero aliasing compression based on groups of weakly independent outputs in circuits with high compl For the test of this structurally realized functional property in a circuit graph, reduction operations and distance operators for a given circuit graph were used. The results for stuck-at and stuck-open faults are discussed by means of the combinational ISCAS 85 benchmarks.

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Formal reasoning on fault coverage of fault tolerant techniques: A case study,nt technique can be proved to tolerate the set of predefined faults iff the actual behaviour of the system is the same as the behaviour of the system in absence of faults. The approach is illustrated by considering the design of a stable storage disk.

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Optimal design of fault-tolerant soft-real-time systems with imprecise computations,eriodic workload. Such a methodology allows us to define optimization strategies whose goal is to determine the optimal trade-off between the system cost and the overall quality of the delivered service.

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Test generation for digital systems based on alternative graphs,est synthesis, multivalued simulation, testability analysis), only a single library of AGs will be used, which reduces the cost of creating and updating component libraries. Aoverview of the model and methods is given and a description of a system for automated test program generation is described.

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On single event upset error manifestation,ments on the microprocessors 68000 and 68070. For the 68000 microprocessor, the type of double errors that occur is explained by a model based on a study of the register file layout. The experiments show a significant fraction of SEUs causing two bits to flip in the primary error manifestation.

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0302-9743 plications; among the topics covered are hardware and software reliability, safety-critical and secure systems, fault-tolerance and detection, verification and validation, formal methods, hardware and software testing, and parallel and distributed systems.978-3-540-58426-1978-3-540-48785-2Series ISSN 0302-9743 Series E-ISSN 1611-3349