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Titlebook: Cryptographic Hardware and Embedded Systems -- CHES 2011; 13th International W Bart Preneel,Tsuyoshi Takagi Conference proceedings 2011 Int

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書(shū)目名稱Cryptographic Hardware and Embedded Systems -- CHES 2011
副標(biāo)題13th International W
編輯Bart Preneel,Tsuyoshi Takagi
視頻videohttp://file.papertrans.cn/241/240548/240548.mp4
概述Up-to-date results.Fast-track conference proceedings.State-of-the-art research
叢書(shū)名稱Lecture Notes in Computer Science
圖書(shū)封面Titlebook: Cryptographic Hardware and Embedded Systems -- CHES 2011; 13th International W Bart Preneel,Tsuyoshi Takagi Conference proceedings 2011 Int
描述This book constitutes the proceedings of the 13th International Workshop on Cryptographic Hardware and Embedded Systems, CHES 2011, held in Nara, Japan, from September 28 until October 1, 2011. The 32 papers presented together with 1 invited talk were carefully reviewed and selected from 119 submissions. The papers are organized in topical sections named: FPGA implementation; AES; elliptic curve cryptosystems; lattices; side channel attacks; fault attacks; lightweight symmetric algorithms, PUFs; public-key cryptosystems; and hash functions.
出版日期Conference proceedings 2011
關(guān)鍵詞digital signatures; key generation; multivariate quadratic cryptography; optimal pairing; true random nu
版次1
doihttps://doi.org/10.1007/978-3-642-23951-9
isbn_softcover978-3-642-23950-2
isbn_ebook978-3-642-23951-9Series ISSN 0302-9743 Series E-ISSN 1611-3349
issn_series 0302-9743
copyrightInternational Association for Cryptologic Research 2011
The information of publication is updating

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FPGA-Based True Random Number Generation Using Circuit Metastability with Adaptive Feedback Control flip-flops. Metastability is achieved by using precise programmable delay lines (PDL) that accurately equalize the signal arrival times to flip-flops. The PDLs are capable of adjusting signal propagation delays with resolutions higher than fractions of a pico second. In addition, a real time monito
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Higher-Order Glitches Free Implementation of the AES Using Secure Multi-party Computation Protocols is nowadays an important topic. In parallel, another class of attacks, called ., have been investigated which exploit the hardware glitches phenomena occurring during the physical execution of algorithms. We introduce in this paper a circuit model that encompasses sufficient conditions to resist gl
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Protecting AES with Shamir’s Secret Sharing Schemelock cipher implementations is masking, which randomizes the variables to be protected by combining them with one or several random values. In this paper, we propose an original masking scheme based on Shamir’s Secret Sharing scheme?[22] as an alternative to Boolean masking. We detail its implementa
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To Infinity and Beyond: Combined Attack on ECC Using Points of Low Orderult injection, these points turn into points of very low order. Using side channel information we deduce when the point at infinity occurs during the scalar multiplication, which leaks information about the secret key. In the best case, our attack breaks a simple and differential side channel analys
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