| 書目名稱 | Creating Assertion-Based IP |
| 編輯 | Harry D. Foster,Adam C. Krolnik |
| 視頻video | http://file.papertrans.cn/240/239342/239342.mp4 |
| 概述 | Demonstrates a systematic process for formal specification and formal testplanning.Demonstrates effective use of assertions languages beyond the traditional language construct discussions.No existing |
| 叢書名稱 | Integrated Circuits and Systems |
| 圖書封面 |  |
| 描述 | .Assertion-based IP is much more than a comprehensive set of related assertions. It is a full-fledged reusable and configurable transaction-level verification component, which is used to detect both interesting and incorrect behaviors. Upon detecting interesting or incorrect behavior, the assertion-based IP alerts other verification components within a simulation environment, which are responsible for taking appropriate action. The focus of this book is to bring the assertion discussion up to a higher level and introduce a process for creating effective, reusable, assertion-based IP, which easily integrates with the user’s existing verification environment, in other words the testbench infrastructure....The guiding principles promoted in this book when creating an assertion-based IP monitor are: ....modularity—.assertion-based IP should have a clear separation between detection and action..clarity—.assertion-based IP should be written initially focusing on capturing intent (versus optimizations) ....A unique feature of this book is the fully worked out, detailed examples. The concepts presented in the book are drawn from the authors’ experience developing assertion-based IP, as wel |
| 出版日期 | Book 20081st edition |
| 關(guān)鍵詞 | Assertion-Based; Foster; Krolnik; SystemVerilog; Verification; Verilog; integrated circuits; optimization; s |
| 版次 | 1 |
| doi | https://doi.org/10.1007/978-0-387-68398-0 |
| isbn_softcover | 978-1-4419-4218-0 |
| isbn_ebook | 978-0-387-68398-0Series ISSN 1558-9412 Series E-ISSN 1558-9420 |
| issn_series | 1558-9412 |
| copyright | Springer-Verlag US 2008 |
|Archiver|手機(jī)版|小黑屋|
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