Titlebook: Computer Engineering and Technology; 19th CCF Conference, Weixia Xu,Liquan Xiao,Chengyi Zhang Conference proceedings 2016 Springer-Verlag B

Hla461

Engaging in a U.S. trade or business,formance. The proposed two algorithms shorten the network long path latency. Compared to the based multicast routing algorithm, our simulations with six different synthetic workloads reveal that our architecture acquires high system performance.

seruting

洞穴

978-3-662-49282-6Springer-Verlag Berlin Heidelberg 2016

Campaign

CALL

Partitioning Methods for Multicast in Bufferless 3D Network on Chipformance. The proposed two algorithms shorten the network long path latency. Compared to the based multicast routing algorithm, our simulations with six different synthetic workloads reveal that our architecture acquires high system performance.

惡臭

Thermal-Aware Floorplanner for Multi-core 3D ICs with Interlayer Cooling and expanded the design space of multi-core microprocessor floorplan. This work proposes a thermal-aware floorplanner for multi-core 3D ICs with interlayer cooling, with iterative algorithm based on simulated annealing method. The results show that the maximal temperature is reduced by 15.., and th

macular-edema

BRUNT

Mitigating Soft Error Rate Through Selective Replication in Hybrid Architectures. The researchers employ a variety of methods to reduce the influence of soft errors. Besides the lower delay and increasing bandwidth, 3D integration technology also has the ability of heterogeneous integration. STT-RAM is a new storage technology with broad prospects. The characteristic that STT-

挑剔小責(zé)

A New Memory Address Transformation for Continuous-Flow FFT Processors with SIMD Extension reversal at input or output stage increases the difficulty for parallel I/O. In this paper, a new and simple generalized memory address transformation method supporting parallel accessing for computation is proposed to accelerate 2.-point Mixed-Radix FFT for memory-based FFT processors with SIMD ex

Obedient

Designing Parallel Sparse Matrix Transposition Algorithm Using ELLPACK-R for GPUsy utilizing the tremendous memory bandwidth and the texture memory, the performance of this algorithm can be efficiently improved. Experimental results show that the performance of the proposed algorithm can be improved up to 8x times on Nvidia Tesla C2070, compared with the implementation on the In