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Titlebook: Automated Analysis of Virtual Prototypes at the Electronic System Level; Design Understanding Mehran Goli,Rolf Drechsler Book 2020 Springer

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發(fā)表于 2025-3-21 17:58:18 | 只看該作者 |倒序?yàn)g覽 |閱讀模式
期刊全稱Automated Analysis of Virtual Prototypes at the Electronic System Level
期刊簡稱Design Understanding
影響因子2023Mehran Goli,Rolf Drechsler
視頻videohttp://file.papertrans.cn/167/166243/166243.mp4
發(fā)行地址Provides an extensive introduction to the field of SystemC-based virtual prototype (VP) analysis at the electronic system level.Describes a design understanding methodology from both debugger-based an
圖書封面Titlebook: Automated Analysis of Virtual Prototypes at the Electronic System Level; Design Understanding Mehran Goli,Rolf Drechsler Book 2020 Springer
影響因子.This book describes a set of SystemC‐based virtual prototype analysis methodologies, including design understanding, verification, security validation, and design space exploration.? Readers will gain an overview of the latest research results in the field of Electronic Design Automation (EDA) at the Electronic System Level (ESL). The methodologies discussed enable readers to tackle easily key tasks and applications in the design process..
Pindex Book 2020
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發(fā)表于 2025-3-21 21:45:10 | 只看該作者
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發(fā)表于 2025-3-22 04:47:16 | 只看該作者
,Rand- und Eigenwertprobleme. Stabilit?t, space exploration. These applications were served to show how the extracted information could be used in practice off the shelf or with minimum translation effort during the design process. Overall, the proposed methodologies are efficient, automated, and significantly advance the current state of the art of the VP analysis at the ESL.
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發(fā)表于 2025-3-22 09:24:21 | 只看該作者
Design Understanding Methodology,gn understanding purpose at the ESL is introduced. The SystemC VPs analysis methodology is introduced in two perspectives, i.e., debugger-based and compiler-based approaches. Then, the visualization of the extracted information is described. Finally, the experimental results related to each approach are presented.
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發(fā)表于 2025-3-22 14:45:21 | 只看該作者
Application II: Security Validation,e of the introduced VP analysis approaches in Chap. . to perform a dynamic information flow tracking analysis to access the run-time behavior of a given VP-based SoC. The extracted behavior is validated against security threat models, such as information leakage (confidentiality) and unauthorized access to data in a memory (integrity).
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發(fā)表于 2025-3-22 20:55:38 | 只看該作者
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發(fā)表于 2025-3-22 23:06:41 | 只看該作者
Background,rious information extraction approaches (i.e., static, dynamic, and hybrid) and a summary of their main features. A summary of the key insight of this chapter is presented in Sect. 2.4, explaining the major limitations of the existing design understanding approaches and the need for a promising way to address these limitations.
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發(fā)表于 2025-3-23 09:15:14 | 只看該作者
ults in the field of Electronic Design Automation (EDA) at the Electronic System Level (ESL). The methodologies discussed enable readers to tackle easily key tasks and applications in the design process..978-3-030-44284-2978-3-030-44282-8
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