Titlebook: Architecture of Computing Systems -- ARCS 2013; 26th International C Hana Kubátová,Christian Hochberger,Bernhard Sick Conference proceeding

謙卑

An Unstructured Termination Detection Algorithm Using Gossip in Cloud Computing Environments,g approaches. To measure the complexity of our proposed algorithm, a new metric, . is used. Our evaluation over scalable settings shows that an unstructured approach has a significant merit to solve scalability and fault-tolerance problems with lower message complexity over existing algorithms.

越自我

Hemiparesis

侵略主義

Iwazaru: The Byzantine Sequencer,o execute the requests. The performance evaluation shows that in gracious executions Iwazaru can perform around 30% faster than Castro and Liskov’s PBFT, which was previously used as an algorithm of choice for request ordering.

A簡(jiǎn)潔的

A Multi-core Memory Organization for 3-D DRAM as Main Memory,ry. The cache like addressing allows for fast address translation and better memory allocation among multiple processes. We explore a set of wide-ranging design parameters for page sizes, sub-page sizes, TLB sizes, and sizes of write-buffers.

尊重

Immortal

Custom Reconfigurable Architecture Based on Virtex 5 Lookup Tables,full hardware implementation and a reconfigurable solution based on vendor tools. Our custom tool for the programming of the architecture performs considerably faster than using partial reconfiguration and the standard vendor tools and is smaller than a full hardware solution.

DUST

人工制品

https://doi.org/10.1007/978-981-13-5956-9 instructions are fetched unnecessarily. This observation provides several opportunities to enhance GPUs. We discuss different possibilities and evaluate filter cache as a case study. Moreover, we investigate how variations in microarchitectural parameters impacts potential filter cache benefits in GPUs.

偶然

Inter-warp Instruction Temporal Locality in Deep-Multithreaded GPUs, instructions are fetched unnecessarily. This observation provides several opportunities to enhance GPUs. We discuss different possibilities and evaluate filter cache as a case study. Moreover, we investigate how variations in microarchitectural parameters impacts potential filter cache benefits in GPUs.