Titlebook: Application Specific Processors; Earl E. Swartzlander Book 1997 Kluwer Academic Publishers 1997 ASIC.CMOS.Computer.algorithms.development.

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Clifford Algebras and Clifford Modulesroach for elementary function evaluation whenever the silicon area is a primary constraint. The main drawback is the intrinsic low performance due to the iterative computational approach. In particular, parallelism cannot be easily introduced since each CORDIC iteration has to select the rotation di

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Construction of Elliptic Diffusions,constituent 1-D transforms are required; therefore the entire processing is fully pipelined. This approach is well suited for VLSI implementation by providing simple and regular structures. Complexity estimation of .*.. shows our multidimensional systolic array is within a factor of . of the lower b

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Mathematics and Its Applicationsed with the interconnection of the heterogeneous building blocks into systems with arbitrary topologies. A communication architecture is proposed that allows the interconnection of processors with varying speed and functionalities. Standardization of the Interface Control Unit (ICU) greatly reduces

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Fault Tolerant Arithmetic,s like sorting networks, FFT arrays, convolvers, and inner product units. This research is significant because the time shared TMR technique proves to be a high reliability, low hardware complexity, and reasonable delay penalty solution to fault tolerant arithmetic.

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Design and Implementation of an Interface Control Unit for Rapid Prototyping,ed with the interconnection of the heterogeneous building blocks into systems with arbitrary topologies. A communication architecture is proposed that allows the interconnection of processors with varying speed and functionalities. Standardization of the Interface Control Unit (ICU) greatly reduces

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